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Machine Scheduler in LLVM – Part II
In the first part of this series, we covered the basic workflow of Machine Scheduler – LLVM’s predominated instruction scheduling framework – and learned that an instruction could go through three phases of checks before it finally got scheduled: legality check, feasibility check, and profitibility check. The first two phases – which were explained in details in that post – have direct connections with program correctness and avoiding potential processor hazard, respectiviely.
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