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Applied Materials reveals chip wiring innovations for energy-efficient computing
Applied Materials has revealed chip wiring innovations that will address challenges for energy-efficient computing.
“The AI era needs more energy-efficient computing, and chip wiring and stacking are critical to performance and power consumption,” said Prabu Raja, president of the Semiconductor Products Group at Applied Materials, in a statement. The new Applied Endura Copper Barrier Seed IMS with Volta Ruthenium CVD (chemical vapor deposition) is being adopted by all leading logic chipmakers and began shipping at the 3nm node. “While advances in patterning are driving continued device scaling, critical challenges remain in other areas including interconnect wiring resistance, capacitance and reliability,” said Sunjung Kim, VP and head of the foundry development Team at Samsung Electronics, in a statement.
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