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Best Options for Using AI in Chip Design


Narrowly defined verticals offer the best opportunities for AI. Plus, what will the impact be on junior engineers?

L-R: Keysight’s McLearnon; Synopsys’ Thiruvengadam; ChipAgents’ Arora; Cadence’s Alpert; Siemens’ Balasubramanian; Baya Systems’ Kumar. If you have a centralized EDA AI system that is driving these flows, when you hit certain heuristics in your design, you actually have to give feedback, either good or bad, to an engineer. If AI can help with that by creating new abstraction levels, making the tools easier to use, and leverage the whole knowledge base effectively, that can lower the bar and bring all these junior engineers into the mainstream.

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