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Cache-Aware Scheduling For Linux Refined - Better AMD & Intel CPU Performance
Going on for several months now has been an effort to wire up cache-aware scheduling / load balancing for the Linux kernel for helping out task placement for processors with multiple cache domains such as modern AMD Ryzen/EPYC and Intel Xeon platforms
Going on for several months now has been an effort to wire up cache-aware scheduling / load balancing for the Linux kernel for helping out task placement for processors with multiple cache domains such as modern AMD Ryzen/EPYC and Intel Xeon platforms. Intel engineer Tim Chen today posted the "v3" patches of cache-aware scheduling for aggregating tasks sharing data to the same cache domain. Those interested in this cache-aware scheduling work for the Linux kernel can see the patch series that remains under a Request For Comments flag.
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