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F8 – an 8 bit architecture designed for C and memory efficiency [video]
- an 8 bit architecture designed for C and memory efficiency - Track: Open Hardware and CAD/CAM - Room: H.1309 (Van Rijn) - Day: Sunday - Start: 09:00 - End: 09:20 - Video only: h1309 - Chat: Join the conversation! Even in modern devices, 8-bit processors are found, but the architectures used are often not well-suited to programming in high-level languages, such as C. E.g.
Even in modern devices, 8-bit processors are found, but the architectures used are often not well-suited to programming in high-level languages, such as C. E.g. MCS-51 (8051, 8052) based microcontrollers in the Realtek WiFi chipsets. The f8 is an architecture based on the experience and lessons learned from maintaining Small Device C Compiler (SDCC) and the many 8-bit architectures it supports. It is designed to find its niche as an 8-bit architecture in places where the power of RISC-V is not needed, and no byte of code or data memory should be wasted.
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