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Fundamental flaws of SIMD ISAs (2021)
ccording to Flynn’s taxonomy SIMD refers to a computer architecture that can process multiple data streams with a single instruction (i.e. “Single Instruction stream, Multiple Data streams”).
At the same time many SIMD operations are pipelined and require several clock cycles to complete (e.g. floating-point arithmetic and memory load instructions). Perhaps the most notable vector processor is the Cray-1(released 1975), and it has served as an inspiration for a new generation of instruction set architectures, including RISC-V RVV. Unfortunately, this kind of manual setup + unrolling + tail handling code uses up unnecessarily large chunks of the instruction cache of a CPU core.
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