Get the latest tech news

Imec demonstrates logic and DRAM structures using High NA EUV Lithography


These Results confirm the readiness of the High NA EUV patterning ecosystem for enabling future logic and memory use cases.

These breakthrough results follow intensive preparatory work by imec and ASML – in close collaboration with its partners – to ready the patterning ecosystem and metrology for the first generation of High NA EUV Lithography. The results showcase the unique potential for High NA EUV to enable single-print imaging of aggressively-scaled 2D features, improving design flexibility as well as reducing patterning cost and complexity. Luc Van den hove, president and CEO of imec: “The results confirm the long-predicted resolution capability of High NA EUV lithography, targeting sub 20nm pitch metal layers in one single exposure.

Get the Android app

Or read this on r/technology

Read more on:

Photo of Logic

Logic

Photo of dram

dram

Photo of Imec

Imec

Related news:

News photo

Imec Successfully Demonstrates High-NA Lithography for Logic and DRAM Patterning for First Time

News photo

Is the Logic of Our "Younger Culture" Harmful to Our Planet

News photo

ASML and Imec unveil pricy High NA EUV playground for chipmakers