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Intel looks beyond silicon, outlines breakthroughs in atomically-thin 2D transistors, chip packaging, and interconnects at IEDM 2024
Smaller, faster, better.
Copper is the material of choice for the billions of nanometer-scale wires that move power and data around inside the chip in a complex 3D grid (you can see what this looks like in this video). Intel says its Subtractive Ruthenium process with airgaps provides up to 25% capacitance at matched resistance at sub-25nm pitches (the center-to-center distance between interconnect lines). With standard silicon, Intel’s transistor disclosures show enhanced gate-all-around RibbonFET CMOS scaling, resulting in a gate length of 6nm and a nanoribbon/nanosheet thickness of 1.7nm while delivering improved short channel effects and higher performance.
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