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Intel Preparing New "Staging" Feature For Better Handling CPU Microcode Updates
Intel is preparing a new staging feature for better handling of CPU microcode updates
Initial patches for the Linux kernel are out for discussion in enabling this feature that can yield around a 40% reduction in latency during the CPU microcode updating process. Currently, writing to MSR_IA32_UCODE_WRITE triggers the entire update process -- loading, validating, and activation -- all of which contribute to the latency during CPU halt. Intel engineers report preliminary testing on a "pre-production system" showed around a 40% reduction in latency during the CPU microcode late-loading process.
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