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Intel's 14A Magic Bullet: Directed Self-Assembly (DSA)
How High-NA EUV can be economically viable at the 1.4nm process node
Customers will use 18A to dip their toes in the Intel waters with less critical chips that are not core to their business; if all goes well, they will look to 14A as the main process for their linchpin designs – think the largest, expensive dies like AI accelerators, CPUS, and potentially even mobile in 2027. Because of limited light source power, delivering higher doses means the scanner must run more slowly, waiting for enough photons to reach each exposure field. PS becomes the line, PMMA leaves the space – it ends up acting more or less the same as developed photoresist, so the typical post-develop integration flows (pattern transfer to hardmask, SOC, substrate, etc.)
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