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Porting Gigabyte MZ33-AR1 Server Board with AMD Turin CPU to Coreboot
Introduction This blog post describes the progress of the first phase of enabling AMD Turin support in coreboot and porting Gigabyte MZ33-AR1 board. The project is funded by NLnet Foundation.
I had a long chat with Felix Held (fellow coreboot developer), who worked on Genoa POC, and helped me understand how the domain map to fabric IDs and the SMN (System Management Network) base addresses. devicetree.cb defines very basic configuration of the board and enables crucial devices for the early booting phase, mainly the lpc_bridge(eSPI) with the ASPEED BMC Super I/O and TPM. Stay tuned: we’re working toward solutions that deliver secure, vertically integrated, real-world applications for privacy-focused environments using the Dasharo Pro Package.
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