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Sandisk puts petabyte SSDs on the roadmap, has yet to reveal release date
It has also discussed how to use 3D DRAM to solve the AI memory crunch.
The chip also has an advanced bus multiplexer that manages increased data load from high-density 3D QLC NAND memory stacks, allowing full channel utilization without sacrificing performance. "UltraQLC [is] custom built based on our decades of experience and our current learnings to really be deployed in the modern data infrastructure while not compromising on density, performance, and power efficiency," said Khurram Ismail the incoming chief of Engineering and Product Management at Sandisk. The third and preferred approach is developing new scalable memory technologies (such as HBF), which Sandisk has been actively pursuing as an alternative to traditional DRAM scaling limitations.
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