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Support For New RISC-V SiFive Vendor Extensions On The Way For Linux 6.16


Queued within the development tree for the RISC-V processor code for the Linux kernel is supporting several new vendor-specific ISA extensions for SiFive RISC-V CPU cores.

Making it this past week into riscv/linux.git's "for-next" branch ahead of Linux 6.16 is this merge for enabling some new SiFive vendor extensions for RISC-V. Four SiFive vendor extensions are set to be introduced with this code for Linux 6.16: xsfvqmaccdod, xsfvqmaccqoq, xsfvfnrclipxfqf, and xsfvfwmaccqqq. These new SiFive vendor-specific ISA extensions will be found on some of their upcoming RISC-V core designs. Compiler work around making use of these SiFive extensions and more continue for both the GNU/GCC and LLVM toolchains.

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