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Xilinx HBM2 Internals (2023)

Conventions MiB = Megabytes (2^20 bytes) Gb = Gigabits (2^27 bytes, or 128MiB) GiB = Gibibytes (2^30 bytes) Background on HBM2 HBM2 is a type of stacked memory, with each stack containing multiple DRAM dies (chips), and each die supporting 2 channels. Every channel accesses a different (and independent) set of DRAM banks - as a result, requests for one channel cannot access data from another channel. This can be thought of as each channel “owning” a certain address range.

Now, the HBM interface has 32 AXI3 ports (provides memory-mapped read/write access to a given portion of the HBM2 address space). Here, I will demonstrate a very simple change to a single timing parameter providing around 1.87% more bandwidth - but first, background! The formula to convert between the format that the refresh period is stored in (here called “ref_per”) follow:

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