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YC is wrong about LLMs for chip design
LLMs don’t make chips better. Good engineers do.
We know there is a clear engineering trade-off: it is possible to optimize especially specialized algorithms or calculations such as cryptocurrency mining, data compression, or special-purpose encryption tasks such that the same computation would happen faster (5x to 100x), and using less energy (10x to 100x). The more charitable version of YC’s proposal is that LLM-based tools will significantly reduce the cost of chip design, which will make hardware acceleration more viable for applications where it’s currently cost-prohibitive. So HLS tools failed to gain any traction for high-value, high-volume chips, where performance and efficiency requirements necessitated human engineers writing high-quality Verilog.
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