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Zhaoxin "Shijidadao" x86_64 CPU Support Merged Into The GCC 15 Compiler
Zhaoxin Shijidadao CPU support was upstreamed today into the GCC 15 compiler codebase
But given that Zhaoxin only upstreamed Yongfeng support into the GCC 14 compiler last October and hasn't posted any new patches since, is likely revealing of what the Shijidadao codename is for... The GCC commit enabling the Zhaoxin Shijidadao CPU support confirms no ISA differences compared to existing Yongfeng processors. Zhaoxin Shijidadao CPUs support x86_64 with MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT, FSGSBASE, CX16, ABM, BMI, BMI2, F16C, FXSR, RDSEED, AVX2, FMA, SHA, and LZCNT instruction set extensions.
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